Isochronets: a High-Speed Network Switching Architecture

Challenge

Traditional network architectures present two main limitations when applied to High-Speed Networks (HSNs): they do not scale with link speeds and they do not adequately support the quality of service needs of high-performance applications. The novel Isochronets architecture overcomes both limitations.

Approach

Isochronets view frame motions over links in analogy to car motions on roads. In the latter, traffic lights coordinate contention at intersections. They can synchronize to create a green wave of uninterrupted motion. Isochronets accomplish similar uninterrupted motion by periodically configuring network switches to create end-end routes in the network. Frames flow along these enabled routes requiring no header processing at intermediate network switches.

The basic construct used to schedule traffic motion is a time band (green band) assigned to a routing tree. During the green band, a frame transmitted by a source will propagate down the routing tree to the destination (root of the tree). If no other traffic contends for the tree, it will move uninterrupted, as depicted by the straight time-line.

The green band in maintained by switching nodes through timers synchronized to reflect latency along tree links. Synchronization is per band size, which is large compared to frame transmission time. It can thus be accomplished trough relatively simple mechanisms. Furthermore, synchronization errors can be easily accommodated. Routing along a green band is accomplished by configuring the switches to route frames on incoming tree links to the appropriate output tree links for the duration of the band. A source sends frames by scheduling transmission to the green bands of its destination.

In similarity to circuit switch or burst switch networks, green bands allocate reserved network resources. However, the units to which resources are allocated are neither point-point connections, not traffic bursts, but routes. Routes represent long-lived entities, and thus processing and scheduling complexities can be resolved over time scale much longer than latency.

Scheduling transmissions to the green bands of the destination offers the basis for synchronization of the end-nodes to the network operation. Isochronets can be used to signal periphery nodes when destination becomes available, leading to a novel transfer mode, called Loosely-synchronous Transfer Mode (LTM). The same signals can propagate through protocols at any layer and enhance their functionality. The resulting Synchronous Protocol Stack (SPS) can support novel application with stringent synchronization requirements.

Isochronets offer several advantages:

Scalability with respect to transmission speeds.
Conversions of frames from optical to electronic representation in order to be processed is not required.
Provision of tunable guaranteed QoS of end-end transport.
Protocol independence.
Internetworking is reduced to media-layer bridging.
Minimization of processing and queueing latency in the transport path.
Support for asynchronous, synchronous and isochronous traffic streams.
Efficient interfacing with end nodes.
Bandwidth heterogeneity is accommodated.

Status

The following is a list of the on-going research in Isochronets:

Design of the Isochronets architecture that includes the switching technique and mechanisms to set up and update the configuration of the switch. The first version of this design is complete.
Design and implementation of an electronic Isochronet switch (Isoswitch) operating at 1 Gb/s port speeds. The first prototype switch is operational. Click here if you would like to see it!
Design of the Loosely-synchronous Transfer Mode (LTM) and the Synchronous Protocol Stack (SPS). The first version of the design is complete.
Performance study of Isochronets using analytical and simulation models. A preliminary performance study is complete.
Study of admission control and band allocation policies.
All-optical implementation of the Isochronet switches.

People in Isochronets

Prof. Yechiam Yemini, Principal Investigator
Apostolos Dailianas, PhD candidate
Ashutosh Dutta, PhD candidate
Ron Erlich, Research Staff
Danilo Florissi, Alumni.

Selected Publications

[DCC-05-95]: An Overview of the Isochronets Architecture for High Speed Networks
Yechiam Yemini and Danilo Florissi
[DCC-01-95]: Isochronets: a high-speed network switching architecture
(Thesis), Danilo Florissi
[DCC-02-94]: Protocols for Loosely-synchronous Networks
Danilo Florissi and Yechiam Yemini
[DCC-01-92]: Isochronets: a high-speed network switching architecture
Yechiam Yemini and Danilo Florissi

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