Makefile - cont.
Macros: shorthand used in a MakefileNAME = value
Example:CC = gccOBJS = file1.o file2.oSRCDIR = user/aya/projFLAGS = -g
Example:myprog : $(OBJS) $(CC) $(FLAGS) -o $@
Example - multiple targets:all : p1 p2p1 : f1.o f2.o $(CC) $(FLAGS) -o $@p2 : f3.o $(CC) $(FLAGS) -o $@f1.o : f1.c mydefs.h $(CC) -c $(FLAGS) f1.c