
	CSEE 4840 Embedded System Design Spring 2025

General Information

Class meets Mondays and Wednesdays, 1:10 - 2:25 PM in 451 CSB.

Mudd 1235 is the lab, which is filled with Linux workstations. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the labs in groups of two or three. Project groups should be 3-5 students; aim for 4.

Staff

Name	Email	Office hours	Location
Prof. Stephen A. Edwards	sedwards@cs.columbia.edu	By appt.	Online
Donovan Sproule	das2313@columbia.edu	Th 4-6	1235 Mudd
Adwyck Gupta	ag5016@columbia.edu	F 10A-12P	1235 Mudd
Peiran Wang	pw2593@columbia.edu	Th 1-3	1235 Mudd
Sean Stothers	sps2308@columbia.edu	F 1-3	1235 Mudd

Overview

Prerequisites: COMS W3827 and COMS W3157 or the equivalent. CSEE W4823 suggested. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

This class will introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will implement a small embedded system using a combination of C and the SystemVerilog hardware description language.

This is a lab course done in two parts. During the first part of the class, you will implement "canned" designs supplied by the instructor and be given substantial guidance. These are meant to teach you the use of the development tools. In the second part of the class, you will divide up into teams and each will design and implement a project of your own with guidance from the instructor and TAs.

This course is a capstone in which students integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design, and addresses lower-level issues than COMS 6868 Embedded Scalable Platforms or EECS E4764 Internet of Things. CSEE 4840 focuses on hardware/software integration. Students in 4840 will use gates, processors, peripherals, software, and operating systems as building blocks.

Prerequisites

CSEE 3827, Fundamentals of Computer Systems or the equivalent. You must understand digital logic design. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

COMS 3157, Advanced Programming or the equivalent. Specifically, C programming experience. While 4840 will teach you advanced aspects of embedded C programming, you need to come in with significant C experience.

COMS W4823, Advanced Digital Logic Design. While not a formal prerequisite, it is strongly encouraged. In it, you will learn advanced logic design and HDL coding, both of which are crucial to success in 4840.

Schedule

Date	Lecture	Due
Wed Jan 22	Introduction: Embedded Systems
Mon Jan 27	SystemVerilog
Wed Jan 29	"
Mon Feb 3	"
Wed Feb 5	Memory
Mon Feb 10	"
Wed Feb 12	Networking, USB, and Threads
Fri Feb 14		Lab 1 Files
Mon Feb 17	"
Wed Feb 19	(no lecture)
Mon Feb 24	Video
Wed Feb 26	Hardware/Software Interfaces
Mon Mar 3	Debugging
Wed Mar 5	The Avalon Bus
Fri Mar 7		Lab 2 Files 16 GB SD Card Image
Mon Mar 10	Device Drivers
Wed Mar 12
Fri Mar 14		Proposal
Mar 17-21	Spring Break
Mon Mar 24	IP Cores and Platform Designer
Wed Mar 26	Sprite Graphics
Mon Mar 31	Line drawing example Processors, FPGAs, and ASICs (1/2) Processors, FPGAs, and ASICs (2/2)
Wed Apr 2	Audio Waveforms
Fri Apr 4		Lab 3 Hardware files Software FIles Kernel Module Env.
Mon Apr 7
Wed Apr 9
Mon Apr 14
Wed Apr 16
Mon Apr 21	Design reviews
Wed Apr 23	Design reviews
Mon Apr 28
Wed Apr 30
Mon May 5
Wed May 14	Final Project Presentations

The Project

You'll perform a design-it-yourself project in the second half of the class. Here are the deliverables:

A short project proposal describing what you plan to build and how you plan to build it. This is to communicate your plans to the professor and TAs so that we can advise you on how to proceed.
A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers, and an analysis of resource usage: everything someone else would need to implement your design. You should have done some preliminary implementation work by this point to validate your design.
A design review during which you discuss and defend the choices you've made in its design and implementation to that point and discuss how you will complete the project. This is to reduce the possibility of questions like "why didn't you do it this much better way?" during your final presentation.
A presentation and demo of your project.
A final project report

Project teams should be three students or more.

The Design Document

This document should explain what you're going to build and how you're going to build it, but does not not need to include code. A corrected version of this document that reflects what you actually built should end up in your final project report.

A Sample Design Document

Include the following:

A block diagram
A description of the algorithms your project will implement
Resource budgets, e.g., for on-chip memory
A detailed plan for the hardware/software interface: every register and bit

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

An overview of your project: a revised version of your project proposal.
The detailed project design documents: a revised version of the project design.
A section listing who did what, what lessons you learned, and advice for future projects
Complete listings of every file you wrote for the project. Include C source, SystemVerilog source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out).

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfiles' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz $(cat myfiles) to create the archive.) that just includes the files necessary to build your project, such as I did for the labs.

Sample Project: Wireframe

Wireframe Project Proposal An example of a complete proposal

Projects

AirplaneBattle: (AG)

Proposal
Hiroki Endo, Noah Hartzfeld, Zhengtao Hu, Jingyi Lai, and Mingzhi Li

Autotune: (PW)

Proposal
Millie Chen, Amanda Jenkins, Charlie Mei, and Meng Fan Wang

Barcode: (AG)

Proposal
Helen Bovington, Ananya Haritsa, Matthew Modi, Rahul Pulidindi, and Kamil Zajkowski

BatMachine: (AG)

Proposal
Nicholas Bykhovsky-Gonzalez and Lourdes Sanchez Medina

BrickBreaker: (SE)

Proposal
Pranav Asuri, Venkat Bitra, Varsha Keshava Prasad, and Doreen Sisanalli

Chess: (SE)

Proposal
Hooman Khaloo, Hongchi Liu, and Pengfei Yan

CircuitSim: (SE)

Proposal
Faustina Cheng, Ming Gong, Case Schemmer, Jary Tolentino, and Andrew Yang

DinoRun: (AG)

Proposal
Swapnil Banerjee, Roshan Prakash, and Anne Rose Sankar Raj

FPGA-MPC: (PW)

Proposal
Godwill Agbehonou, Alexander Du, Roy Hwang, and Apurva Reddy

FlappyBird: (AG)

Proposal
Tianshuo Jin, Sijun Li, Zidong Xu, and Ethan Yang

ForestFireIce: (SS)

Proposal
Yang Cao, Zhenqi Li, Yonghao Lin, Yifan Mao, and Weijie Wang

GeometryDash: (SS)

Proposal
Charles Chen, Riju Dey, Sasha Isler, and Rachinta Marpaung

Gesture: (DS)

Proposal
Yangfan Wang, Xincheng Yu, and Fengze Zhong

MMT: (SS)

Proposal
Kyle Edwards, William Freedman, Sadie Freisthler, Madeline Skeel, and Jake Torres

MNIST: (DS)

Proposal
Connor Espenshade, Bradley Jocelyn, Aymen Norain, and Stephen Ogunmwonyi

N-Body: (PW)

Proposal
Adib Khondoker, Moises Mata, Kristian Nikolov, Robert Pendergrast, and William Trost

Pac-Man: (DS)

Proposal
Caiwu Chen, Emma Li, Haoming Ma, and Tz-Jie Yu

PacketFilter: (SE)

Proposal
Michael Grieco, Adwyck Gupta, and Harry Zhang

PianoHeroes: (SE)

Proposal
Anita Bui-Martinez, Michael John Flynn, Zakiy Manigo, and Robel Wondwossen

Poker: (SS)

Proposal
Mahdi Ali-Raihan, Mario Carrillo, Timothy Melendez, and Julio Ramirez

Rhythm-Master: (PW)

Proposal
Hongrui Huang, Yangyang Zhang, and Junfeng Zou

ScreamJump: (SS)

Proposal
Sharwari Bhosale, Ananya Maan Singh, and Kamala Vennela Vasireddy

SonicSecurity: (PW)

Proposal
Tyler Chang, Jaewon Lee, and Joshua Mathew

Systolic: (DS)

Proposal
Sicheng Hua, Yu Jia, Siyuan Li, Hang Ye, and Xuanmin Zheng

Tetris: (DS)

Proposal
Michael Lippe, Bhargav Sriram, and Garvit Vyas

My favorites

Resources

Terasic's DE1-SoC Page: documentation on the DE1-SoC board (manual, schematics, etc.), demo projects
Intel's Quartus Prime User Guides: Manuals for the Quartus Prime system (FPGA development tools)
Intel Cyclone V SoC FPGAs: Detailed information about the main chip (a Cyclone V SE) on the DE1-SoC board

Other References

Ueda et al. TV Game System Having Reduced Memory Needs. United States Patent #4,824,106. April 25, 1989.
Datasheet for the sprite-based Texas Instruments TMS9918 Video Display Processor.

Recommended Texts

Mark Zwolinski.
Digital System Design with SystemVerilog.
Prentice-Hall, 2010.

SystemVerilog is relatively new, so there are not too many books out there for it. This is one of the better ones. It focuses on the sythesizable subset of the language and also discusses test benches.

Cover of Digital System Design with SystemVerilog

James K. Peckol.
Embedded Systems: A Contemporary Design Tool.
Wiley, 2008.

Many embedded system books are too idiosyncratic or incomplete for my taste, but this one does a nice job covering everything from digital circuit design to interprocess communication in real-time operating systems. It only discusses the Verilog language and only in an appendix.

Cover of Embedded Systems: A Contemporary Design Tool

Class Policies

Grading	30% Labs
	20% Design Review
	50% Final Report and presentation
Late Policy	Zero credit for anything handed in after it is due without explicit approval of the instructor.
Collaboration Policy	Work in groups of three on the labs. You may consult others, but do not copy files or data. You may collaborate with anybody on the project, but must cite sources if you use code.