Stephen A. Edwards Columbia University Crown
CSEE 4840
Embedded System Design
Spring 2025

General Information

Class meets Mondays and Wednesdays, 1:10 - 2:25 PM in 451 CSB.

Mudd 1235 is the lab, which is filled with Linux workstations. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the labs in groups of two or three. Project groups should be 3-5 students; aim for 4.

Staff

Name Email Office hours Location
Prof. Stephen A. Edwards sedwards@cs.columbia.edu By appt. Online
Abhilash Ganga ag4797@columbia.edu TBA 1235 Mudd
Donovan Sproule das2313@columbia.edu TBA 1235 Mudd
Adwyck Gupta ag5016@columbia.edu TBA 1235 Mudd
Peiran Wang pw2593@columbia.edu TBA 1235 Mudd

Overview

Prerequisites: COMS W3827 and COMS W3157 or the equivalent. CSEE W4823 suggested. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

This class will introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will implement a small embedded system using a combination of C and the SystemVerilog hardware description language.

This is a lab course done in two parts. During the first part of the class, you will implement "canned" designs supplied by the instructor and be given substantial guidance. These are meant to teach you the use of the development tools. In the second part of the class, you will divide up into teams and each will design and implement a project of your own with guidance from the instructor and TAs.

This course is a capstone in which students integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design, and addresses lower-level issues than COMS 6868 Embedded Scalable Platforms or EECS E4764 Internet of Things. CSEE 4840 focuses on hardware/software integration. Students in 4840 will use gates, processors, peripherals, software, and operating systems as building blocks.

Prerequisites

CSEE 3827, Fundamentals of Computer Systems or the equivalent. You must understand digital logic design. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

COMS 3157, Advanced Programming or the equivalent. Specifically, C programming experience. While 4840 will teach you advanced aspects of embedded C programming, you need to come in with significant C experience.

COMS W4823, Advanced Digital Logic Design. While not a formal prerequisite, it is strongly encouraged. In it, you will learn advanced logic design and HDL coding, both of which are crucial to success in 4840.

Schedule

Date Lecture Notes Due
Wed Jan 22 Introduction: Embedded Systems
pdf
Mon Jan 27 SystemVerilog
pdf
Wed Jan 29 "

Mon Feb 3 "

Wed Feb 5 Memory
pdf
Mon Feb 10 "

Wed Feb 12 Networking, USB, and Threads
pdf
Fri Feb 14 Lab 1 pdf
Files.tar.gz
Mon Feb 17 "

Wed Feb 19 Video
pdf
Mon Feb 24 (no lecture)

Wed Feb 26 (no lecture)

Mon Mar 3 Hardware/Software Interfaces
pdf
Proposal
Wed Mar 5 The Avalon Bus
pdf
Mon Mar 10 Device Drivers
pdf
Wed Mar 12 Qsys and IP Core Integration
Debugging
pdf
pdf
Mar 17-21 Spring Break
Mon Mar 24 Sprite Graphics
Line drawing example
Processors, FPGAs, and ASICs (1/2)
Processors, FPGAs, and ASICs (2/2)
Audio Waveforms
pdfpdf
pdfpdf
pdfpdf
pdfpdf
pdfpdf
Wed Mar 26 (no lectures going forward)

Mon Mar 31
Wed Apr 2
Mon Apr 7
Wed Apr 9
Mon Apr 14
Wed Apr 16
Mon Apr 21 Design reviews

Wed Apr 23 Design reviews

Mon Apr 28
Wed Apr 30
Mon May 5
Wed May 14 Final Project Presentations

The Project

You'll perform a design-it-yourself project in the second half of the class. Here are the deliverables:

  1. A short project proposal describing what you plan to build and how you plan to build it. This is to communicate your plans to the professor and TAs so that we can advise you on how to proceed.
  2. A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers, and an analysis of resource usage: everything someone else would need to implement your design. You should have done some preliminary implementation work by this point to validate your design.
  3. A design review during which you discuss and defend the choices you've made in its design and implementation to that point and discuss how you will complete the project. This is to reduce the possibility of questions like "why didn't you do it this much better way?" during your final presentation.
  4. A presentation and demo of your project.
  5. A final project report

Project teams should be three students or more.

The Design Document

This document should explain what you're going to build and how you're going to build it, but does not not need to include code. A corrected version of this document that reflects what you actually built should end up in your final project report.

Include the following:

  1. A block diagram
  2. A description of the algorithms your project will implement
  3. Resource budgets, e.g., for on-chip memory
  4. A detailed plan for the hardware/software interface: every register and bit

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

  1. An overview of your project: a revised version of your project proposal.
  2. The detailed project design documents: a revised version of the project design.
  3. A section listing who did what, what lessons you learned, and advice for future projects
  4. Complete listings of every file you wrote for the project. Include C source, SystemVerilog source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out).

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfiles' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz $(cat myfiles) to create the archive.) that just includes the files necessary to build your project, such as I did for the labs.

Sample Project: Wireframe

Projects

team10:

Yang Cao
team11:

Mahdi Ali-Raihan and Mario Carrillo
team12:

Tyler Chang, Jaewon Lee, and Joshua Mathew
team13:

Caiwu Chen and Yuxi Zhang
team16:

Faustina Cheng and Andrew Yang
team17:

Riju Dey and Tz-Jie Yu
team18:

Alexander Du and Roy Hwang
team20:

Hiroki Endo and Jingyi Lai
team22:

Anita Bui-Martinez and Michael John Flynn
team25:

Tiffany Fu
team26:

Ming Gong and Zidong Xu
team28:

Leon Gruber, Zhengtao Hu, and Hooman Khaloo
team29:

Adwyck Gupta
team3:

Pranav Asuri and Ananya Maan Singh
team30:

Heejong Han
team32:

Darcy He
team33:

Sicheng Hua and Siyuan Li
team34:

Hongrui Huang and Fengze Zhong
team35:

Sasha Isler
team36:

Amanda Jenkins
team37:

Yu Jia, Hang Ye, and Xuanmin Zheng
team39:

Paul Kearns
team4:

Swapnil Banerjee
team40:

Varsha Keshava Prasad and Anne Rose Sankar Raj
team41:

Adib Khondoker and Kristian Nikolov
team43:

Noah Hartzfeld and Mingzhi Li
team44:

Sijun Li
team45:

Zhenqi Li
team46:

Yonghao Lin
team47:

Michael Lippe, Bhargav Sriram, and Garvit Vyas
team48:

Hongchi Liu and Pengfei Yan
team49:

Haoming Ma and Roshan Prakash
team5:

Sharwari Bhosale and Kamala Vennela Vasireddy
team51:

Yifan Mao and Weijie Wang
team52:

Rachinta Marpaung, Timothy Melendez, and Julio Ramirez
team53:

Moises Mata, Robert Pendergrast, and William Trost
team55:

Matthew Modi and Kamil Zajkowski
team56:

Bradley Jocelyn and Aymen Norain
team57:

Connor Espenshade and Stephen Ogunmwonyi
team58:

Kunjoo Park
team59:

Emma Li and Lillian Perriello
team6:

Venkat Bitra and Doreen Sisanalli
team60:

Pranavi Puvvadi
team61:

Godwill Agbehonou, Charles Chen, and Apurva Reddy
team62:

Seyoung Ree
team63:

Case Schemmer and Jary Tolentino
team64:

Sadie Freisthler and Madeline Skeel
team65:

Kyle Edwards, William Freedman, and Jake Torres
team66:

Millie Chen, Charlie Mei, and Meng Fan Wang
team68:

Zakiy Manigo and Robel Wondwossen
team69:

Ethan Yang
team7:

Helen Bovington
team70:

Yangfan Wang and Xincheng Yu
team71:

Michael Grieco and Harry Zhang
team73:

Yangyang Zhang and Junfeng Zou
team9:

Nicholas Bykhovsky-Gonzalez and Lourdes Sanchez Medina

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Resources

Other References

Recommended Texts

Mark Zwolinski.
Digital System Design with SystemVerilog.
Prentice-Hall, 2010.

SystemVerilog is relatively new, so there are not too many books out there for it. This is one of the better ones. It focuses on the sythesizable subset of the language and also discusses test benches.

Cover of Digital System Design with SystemVerilog

James K. Peckol.
Embedded Systems: A Contemporary Design Tool.
Wiley, 2008.

Many embedded system books are too idiosyncratic or incomplete for my taste, but this one does a nice job covering everything from digital circuit design to interprocess communication in real-time operating systems. It only discusses the Verilog language and only in an appendix.

Cover of Embedded Systems: A Contemporary Design Tool

Links

Class Policies

Grading 30% Labs
20% Design Review
50% Final Report and presentation
Late Policy Zero credit for anything handed in after it is due without explicit approval of the instructor.
Collaboration Policy Work in groups of three on the labs. You may consult others, but do not copy files or data. You may collaborate with anybody on the project, but must cite sources if you use code.

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