My
ORCID:
0000-0003-2609-4861
This material is based upon work supported by the National
Science Foundation under grants 0133348 (CAREER), 0614799
(SHIM), and 0720292 (PRET). Other support has come from DARPA,
the NIH, the SRC, the New York State NYSTAR program,
Intel Corporation, and Altera.
Any opinions, findings, and conclusions or recommendations
expressed in this material are those of the author(s) and do
not necessarily reflect the views of the National Science
Foundation or any other source of support.
1. |
![PDF file](icons/pdficon-large.png) |
John Hui.
Sparse Synchronous Programming with Temporal Abstractions.
PhD Thesis, Columbia University.
October 2024.
|
6. |
![PDF file](icons/pdficon-large.png) |
Maxwell Levatich and Robert Brotzman and Benjamin Flin and Ta Chen and Rajesh Krishnan and Michael Kaplan and Stephen A. Edwards.
C Program Partitioning with Fine-Grained Security Constraints and Post-Partition Verification.
In
Proceedings of the IEEE Military Communications Conference (MILCOM),
pages 285-291,
Rockville, Maryland, USA,
November 2022.
|
7. |
![PDF file](icons/pdficon-large.png) |
Robert Krook and John Hui and Bo Joel Svensson and Stephen A. Edwards and Koen Claessen.
Creating a Language for Writing Real-Time Applications for the Internet of Things.
In
Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE),
Shanghai, China,
October 2022.
|
8. |
![PDF file](icons/pdficon-large.png) |
Martha Barker and Stephen A. Edwards and Martha Kim.
Synthesized In-BRAM Garbage Collection for Accelerators with Immutable Memory.
In
Proceedings of Field Programmable Logic and Applications (FPL),
Belfast, UK,
August 2022.
|
9. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and John Hui.
The Sparse Synchronous Model.
In
Forum on Specification and Design Languages (FDL),
Kiel, Germany,
September 2020.
|
10. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
The FHW Project: High-Level Hardware Synthesis from Haskell Programs.
Columbia University, Department of Computer Science CUCS-003-19.
August 2019.
|
11. |
![PDF file](icons/pdficon-large.png) |
Lottarini, Andrea and Cerqueira, Jo\~ao P. and Repetti, Thomas J. and Edwards, Stephen A. and Ross, Kenneth A. and Seok, Mingoo and Kim, Martha A..
Master of None Acceleration: A Comparison of Accelerator Architectures for Analytical Query Processing.
In
Proceedings of the International Symposium on Computer Architecture (ISCA),
pages 762-773,
June 2019.
|
12. |
![PDF file](icons/pdficon-large.png) |
Richard Townsend.
Compiling Irregular Software to Specialized Hardware.
PhD Thesis, Columbia University, Department of Computer Science.
June 2019.
Also technical report CUCS-002-19.
|
13. |
|
Stephen A. Edwards.
Further Experiences Teaching an FPGA-Based Embedded Systems Class.
In Roger Chamberlain and Walid Taha and Martin T\"orngren, ed.
Cyber Physical Systems. Model-Based Design.
pages 222-230,
Springer,
2019.
|
14. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Richard Townsend and Martha Barker and Martha A. Kim.
Compositional Dataflow Circuits.
ACM Transactions on Embedded Computing Systems 18(1):5,
February 2019.
|
15. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Further Experiences Teaching an FPGA-Based Embedded Systems Class.
In
Proceedings of the Workshop on Embedded Systems Education (WESE),
Turin, Italy,
October 2018.
|
17. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Richard Townsend and Martha A. Kim.
Compositional Dataflow Circuits.
In
Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE),
pages 175-184,
Vienna, Austria,
September 2017.
|
18. |
![PDF file](icons/pdficon-large.png) |
Andrea Lottarini and Stephen A. Edwards and Kenneth A. Ross and Martha A. Kim.
Network Synthesis for Database Processing Units.
In
Proceedings of the Design Automation Conference (DAC),
Austin, Texas,
June 2017.
|
20. |
![PDF file](icons/pdficon-large.png) |
Richard Townsend and Martha A. Kim and Stephen A. Edwards.
From Functional Programs to Pipelined Dataflow Circuits.
In
Proceedings of Compiler Construction (CC),
pages 76-86,
Austin, Texas,
February 2017.
|
21. |
|
Stephen A. Edwards and Joseph T. Buck.
Design and Verification Languages.
In Luciano Lavagno and Igor L. Markov and Grant Martin and Louis K. Scheffer, ed.
Electronic Design Automation for IC System Design, Verification, and Testing.
chapter 15,
pages 373-400,
CRC Press,
2016.
|
22. |
|
Stephen A. Edwards and Joseph T. Buck.
System-Level Specification and Modeling Languages.
In Luciano Lavagno and Igor L. Markov and Grant Martin and Louis K. Scheffer, ed.
Electronic Design Automation for IC System Design, Verification, and Testing.
chapter 4,
pages 59-74,
CRC Press,
2016.
|
23. |
![PDF file](icons/pdficon-large.png) |
Kuangya Zhai and Richard Townsend and Lianne Lairmore and Martha A. Kim and Stephen A. Edwards.
Hardware Synthesis from a Recursive Functional Language.
In
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS),
pages 83-93,
Amsterdam, The Netherlands,
October 2015.
|
24. |
![PDF file](icons/pdficon-large.png) |
Bingyi Cao and Kenneth A. Ross and Martha A. Kim and Stephen A. Edwards.
Implementing Latency-Insensitive Dataflow Blocks.
In
Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE),
pages 179-187,
Austin, Texas,
September 2015.
|
25. |
![PDF file](icons/pdficon-large.png) |
Richard Townsend and Martha A. Kim and Stephen A. Edwards.
Hardware in Haskell: Implementing Memories in a Stream-Based World.
Columbia University, Department of Computer Science CUCS-017-15.
September 2015.
|
26. |
![PDF file](icons/pdficon-large.png) |
Kuangya Zhai and Richard Townsend and Lianne Lairmore and Martha A. Kim and Stephen A. Edwards.
Hardware Synthesis from a Recursive Functional Language.
Columbia University, Department of Computer Science CUCS-007-15.
April 2015.
|
27. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Hiren Patel.
MEMOCODE 2014 Software Design Contest: Space Invaders Emulator.
In
Proceedings of the International Conference on Formal Methods and Models for Codesign (MEMOCODE),
pages 185,
Lausanne, Switzerland,
October 2014.
Invited.
|
29. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Alain Girault and Klaus Schneider.
Synchronous Programming (Dagstuhl Seminar 13471).
Dagstuhl Reports 3(11):117-143,
March 2014.
|
30. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Functioning Hardware from Functional Programs.
Columbia University, Department of Computer Science CUCS-027-13.
October 2013.
|
31. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
A Finer Functional Fibonacci on a Fast FPGA.
Columbia University, Department of Computer Science CUCS-005-13.
February 2013.
|
32. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Reconstructing Pong on an FPGA.
Columbia University, Department of Computer Science CUCS-0023-12.
December 2012.
|
33. |
![PDF file](icons/pdficon-large.png) |
Neil Deshpande and Stephen A. Edwards.
Statically Unrolling Recursion to Improve Opportunities for Parallelism.
Columbia University, Department of Computer Science CUCS-011-12.
July 2012.
|
35. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Functional Fibonacci to a Fast FPGA.
Columbia University, Department of Computer Science CUCS-010-12.
June 2012.
|
36. |
![PDF file](icons/pdficon-large.png) |
Lisa Wu and Martha A. Kim and Stephen A. Edwards.
Cache Impacts of Datatype Acceleration.
Computer Architecture Letters 11(1):21-24,
January 2012.
Selected as one of the ``Best Papers from Computer Architecture Letters'' in 2011.
|
37. |
![PDF file](icons/pdficon-large.png) |
Nalini Vasudevan.
Efficient, Deterministic and Deadlock-free Concurrency.
PhD Thesis, Columbia University.
March 2011.
CUCS-013-11.
|
38. |
![PDF file](icons/pdficon-large.png) |
Marcio Buss and Daniel Brand and Vugranam Sreedhar and Stephen A. Edwards.
A novel analysis space for pointer analysis and its application for bug finding.
Science of Computer Programming 75(11):921-942,
November 2010.
|
45. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Retrocomputing on an FPGA.
Circuit Cellar 233:24-35,
December 2009.
|
50. |
![PDF file](icons/pdficon-large.png) |
Sungjun Kim and Hiren D. Patel and Stephen A. Edwards.
Using a Model Checker to Determine Worst-case Execution Time.
Columbia University, Department of Computer Science CUCS-038-09.
September 2009.
|
54. |
![PDF file](icons/pdficon-large.png) |
Nalini Vasudevan and Olivier Tardieu and Julian Dolby and Stephen A. Edwards.
Compile-Time Analysis and Specialization of Clocks in Concurrent Programs.
In
Proceedings of Compiler Construction (CC),
pages 48-62,
York, United Kingdom,
March 2009.
|
56. |
![PDF file](icons/pdficon-large.png) |
Devesh Dedhia.
Example application under PRET environment - Programming a MultiMediaCard.
Columbia University, Department of Computer Science CUCS-005-09.
January 2009.
|
57. |
![PDF file](icons/pdficon-large.png) |
Ravindra Babu Ganapathi and Stephen A. Edwards.
SHIM Optimization: Elimination Of Unstructured Loops.
Columbia University, Department of Computer Science CUCS-054-08.
December 2008.
|
58. |
![PDF file](icons/pdficon-large.png) |
Keerti Joshi and Delvin Kellebrew.
A MPEG Decoder in SHIM.
Columbia University, Department of Computer Science CUCS-057-08.
December 2008.
|
59. |
![PDF file](icons/pdficon-large.png) |
David Lariviere and Stephen A. Edwards.
uClinux on the Altera DE2.
Columbia University, Department of Computer Science CUCS-055-08.
December 2008.
|
60. |
![PDF file](icons/pdficon-large.png) |
Nishant R. Shah.
Memory Issues in PRET Machines.
Columbia University, Department of Computer Science CUCS-059-08.
December 2008.
|
61. |
![PDF file](icons/pdficon-large.png) |
Dave Aaron Smith and Nalini Vasudevan and Stephen Edwards.
Static Deadlock Detection in SHIM with an Automata Type Checking System.
Columbia University, Department of Computer Science CUCS-053-08.
December 2008.
|
62. |
![PDF file](icons/pdficon-large.png) |
Nalini Vasudevan and Olivier Tardieu and Julian Dolby and Stephen A. Edwards.
Analysis of Clocks in X10 Programs (Extended).
Columbia University, Department of Computer Science CUCS-052-08.
December 2008.
|
66. |
![PDF file](icons/pdficon-large.png) |
Ben Lickly and Isaac Liu and Sungjun Kim and Hiren D. Patel and Stephen A. Edwards and Edward A. Lee.
Predictable Programming on a Precision Timed Architecture.
University of California, Berkeley UCB/EECS-2008-40.
April 2008.
|
70. |
![PDF file](icons/pdficon-large.png) |
Marcio Buss.
Summary-Based Pointer Analysis Framework for Modular Bug Finding.
PhD Thesis, Columbia University.
February 2008.
CUCS-013-08.
|
72. |
![PDF file](icons/pdficon-large.png) |
Jia Zeng.
Partial Evaluation for Code Generation from Domain-Specific Languages.
PhD Thesis, Columbia University.
November 2007.
CUCS-048-07.
|
73. |
![PDF file](icons/pdficon-large.png) |
Cristian Soviani.
High Level Synthesis for Packet Processing Pipelines.
PhD Thesis, Columbia University.
October 2007.
CUCS-041-07.
|
74. |
![PDF file](icons/pdficon-large.png) |
Marcio Buss and Daniel Brand and Vugranam Sreedhar and Stephen A. Edwards.
A New Abstraction for Summary-Based Pointer Analysis.
IBM RC24104.
July 2007.
|
78. |
![PDF file](icons/pdficon-large.png) |
Olivier Tardieu and Stephen A. Edwards.
Instantaneous Transitions in Esterel.
In
Proceedings of the Workshop on Model-Driven High-Level Programming of Embedded Systems (SLA++P),
Braga, Portugal,
March 2007.
|
79. |
![PDF file](icons/pdficon-large.png) |
Haim Cohen and Stephen A. Edwards.
\sets\-A Lightweight Constraint Programming Language Based on ROBDDs.
In
Proceedings of the IADIS International Conference on Applied Computing,
Salamanca, Spain,
February 2007.
|
81. |
|
Dumitru Potop-Butucaru and Stephen A. Edwards and G\'erard Berry.
Compiling Esterel.
Springer,
2007.
|
82. |
![PDF file](icons/pdficon-large.png) |
Chen-Chun Huang and Javier Coca and Yashket Gupta and Stephen A. Edwards.
An Implementation of a Renesas H8/300 Microprocessor with a Cycle-Level Timing Extension.
Columbia University, Department of Computer Science CUCS-051-06.
December 2006.
|
83. |
![PDF file](icons/pdficon-large.png) |
Smridh Thapar and Olivier Tardieu and Stephen A. Edwards.
Arrays in SHIM: A Proposal.
Columbia University, Department of Computer Science CUCS-047-06.
December 2006.
|
84. |
![PDF file](icons/pdficon-large.png) |
Nalini Vasudevan and Stephen A. Edwards.
A JPEG Decoder in SHIM.
Columbia University, Department of Computer Science CUCS-048-06.
December 2006.
|
85. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Edward A. Lee.
The Case for the Precision Timed (PRET) Machine.
EECS Department, University of California, Berkeley UCB/EECS-2006-149.
November 2006.
|
87. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
The Challenges of Synthesizing Hardware from C-Like Languages.
IEEE Design \& Test of Computers 23(5):375-386,
September 2006.
|
88. |
![PDF file](icons/pdficon-large.png) |
Neesha Subramaniam and Ohan Oda and Stephen A. Edwards.
MacShim: Compiling MATLAB to a Scheduling-Independent Concurrent Language.
Columbia University, Department of Computer Science CUCS-038-06.
September 2006.
|
89. |
![PDF file](icons/pdficon-large.png) |
Olivier Tardieu and Stephen A. Edwards.
Scheduling-Independent Threads and Exceptions in SHIM.
Columbia University, Department of Computer Science CUCS-036-06.
September 2006.
|
90. |
![PDF file](icons/pdficon-large.png) |
Olivier Tardieu and Stephen A. Edwards.
Specifying Confluent Processes.
Columbia University, Department of Computer Science CUCS-037-06.
September 2006.
|
96. |
![PDF file](icons/pdficon-large.png) |
Jia Zeng and Chuck Mitchell and Stephen A. Edwards.
A Domain-Specific Language for Generating Dataflow Analyzers.
In
Proceedings of the Sixth Workshop on Language Descriptions, Tools and Applications,
Vienna, Austria,
April 2006.
|
98. |
![PDF file](icons/pdficon-large.png) |
Becky Plummer and Mukul Khajanchi and Stephen A. Edwards.
An Esterel Virtual Machine for Embedded Systems.
In
Proceedings of Synchronous Languages, Applications, and Programming (SLAP),
pages 1-14,
Vienna, Austria,
March 2006.
|
100. |
|
Stephen A. Edwards.
Design and Verification Languages.
In Luciano Lavagno and Grant Martin and Lou Scheffer, ed.
Electronic Design Automation for Integrated Circuits Handbook.
CRC Press,
Boca Raton, Florida,
2006.
|
103. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Experiences Teaching an FPGA-based Embedded Systems Class.
ACM SIGBED Review 2(4):56-62,
October 2005.
Originally presented at the Workshop on Embedded Systems Education.
|
108. |
![PDF file](icons/pdficon-large.png) |
Marcio Buss and Stephen A. Edwards and Bin Yao and Daniel Waddington.
Pointer Analysis for C Programs Through AST Traversal.
Columbia University, Department of Computer Science CUCS-028-05.
August 2005.
|
109. |
![PDF file](icons/pdficon-large.png) |
Christopher L. Conway and Kedar S. Namjoshi and Dennis Dams and Stephen A. Edwards.
Incremental Algorithms for Inter-procedural Analysis of Safety Properties.
Columbia University, Department of Computer Science CUCS-018-05.
July 2005.
|
112. |
![PDF file](icons/pdficon-large.png) |
Cristian Soviani and Stephen A. Edwards.
Challenges in Synthesizing Fast Control-Dominated Circuits.
In
Proceedings of the International Workshop on Logic Synthesis (IWLS),
pages 326-332,
Lake Arrowhead, California,
June 2005.
|
113. |
![PDF file](icons/pdficon-large.png) |
Cristian Soviani and Olivier Tardieu and Stephen A. Edwards.
High-Level Optimization by Combining Retiming and Shannon Decomposition.
In
Proceedings of the International Workshop on Logic Synthesis (IWLS),
pages 16-23,
Lake Arrowhead, California,
June 2005.
|
114. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
SHIM: A Language for Hardware/Software Integration.
In
Proceedings of Synchronous Languages, Applications, and Programming (SLAP),
Edinburgh, Scotland,
April 2005.
|
116. |
|
Stephen A. Edwards.
Languages for Embedded Systems.
In Richard Zurawski, ed.
The Embedded Systems Handbook.
pages 7-1-7-19,
CRC Press,
Boca Raton, Florida,
2005.
|
117. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Chun Li.
Determining Interfaces using Type Inference.
Columbia University, Department of Computer Science CUCS-052-04.
December 2004.
|
118. |
|
Stephen A. Edwards.
Languages for Embedded Systems.
In Richard Zurawski, ed.
The Industrial Information Technology Handbook.
pages 85-1-85-18,
CRC Press,
Boca Raton, Florida,
2004.
|
119. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
SHIM: A Language for Hardware/Software Integration.
In
Proceedings of SYNCHRON,
Schloss Dagstuhl, Germany,
December 2004.
|
120. |
![PDF file](icons/pdficon-large.png) |
Cristian Soviani and Jia Zeng and Stephen A. Edwards.
Sequential Challenges in Synthesizing Esterel.
Columbia University, Department of Computer Science CUCS-051-04.
December 2004.
|
121. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Design and Verification Languages.
Columbia University, Department of Computer Science CUCS-046-04.
November 2004.
|
122. |
![PDF file](icons/pdficon-large.png) |
Hanoril Estevez and Stephen A. Edwards.
Live CD Cluster Performance.
Columbia University, Department of Computer Science CUCS-037-04.
October 2004.
|
124. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
The Challenges of Hardware Synthesis from C-like Languages.
In
Proceedings of the International Workshop on Logic Synthesis (IWLS),
pages 509-516,
Temecula, California,
June 2004.
|
127. |
![PDF file](icons/pdficon-large.png) |
Cristian Soviani and Jia Zeng and Stephen A. Edwards.
Improved Controller Synthesis from Esterel.
Columbia University, Department of Computer Science CUCS-015-04.
March 2004.
|
128. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards and Edward A. Lee.
The Semantics and Execution of a Synchronous Block-Diagram Language.
Science of Computer Programming 48(1):21-42,
July 2003.
|
130. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
Design Languages for Embedded Systems.
Columbia University, Department of Computer Science CUCS-009-03.
May 2003.
|
132. |
![PDF file](icons/pdficon-large.png) |
Stephen Jan and Paolo de Dios and Stephen A. Edwards.
Porting a Network Cryptographic Service to the RMC2000: A Case Study in Embedded Software Development.
In
Designers' Forum: Design Automation and Test in Europe Conference and Exhibition,
pages 150-155,
Munich, Germany,
March 2003.
Also appears as Chapter 13 of \emphEmbedded Software for SoC, Jerraya, Yoo, Verkest and Wehn eds., Kluwer, 2003.
|
133. |
![PDF file](icons/pdficon-large.png) |
Albert Benveniste and Paul Caspi and Stephen A. Edwards and Nicolas Halbwachs and Paul Le Guernic and Robert de Simone.
The Synchronous Languages 12 Years Later.
Proceedings of the IEEE 91(1):64-83,
January 2003.
|
135. |
![PDF file](icons/pdficon-large.png) |
Stephen A. Edwards.
High-level Synthesis from the Synchronous Language Esterel.
In
Proceedings of the International Workshop on Logic Synthesis (IWLS),
New Orleans, Louisiana,
June 2002.
|
139. |
|
Stephen A. Edwards.
Languages for Digital Embedded Systems.
Kluwer,
Boston, Massachusetts,
2000.
|
142. |
![PDF file](icons/pdficon-large.png) |
Gitanjali Swamy and Stephen Edwards and Robert Brayton.
Efficient Verification and Synthesis using Design Commonalities.
In
Proceedings of the Eleventh International Conference on VLSI Design (VLSI'98),
pages 542-551,
Chennai, India,
January 1998.
|
143. |
![PDF file](icons/pdficon-large.png) |
Stephen Anthony Edwards.
The Specification and Execution of Heterogeneous Synchronous Reactive Systems.
PhD Thesis, University of California, Berkeley.
May 1997.
Available as UCB/ERL M97/31.
|
145. |
![PDF file](icons/pdficon-large.png) |
Stephen Edwards and Luciano Lavagno and Edward A. Lee and Alberto Sangiovanni-Vincentelli.
Design of Embedded Systems: Formal Models, Validation, and Synthesis.
Proceedings of the IEEE 85(3):366-390,
March 1997.
|
146. |
![PDF file](icons/pdficon-large.png) |
Robert K. Brayton and Gary D. Hachtel and Alberto L. Sangiovanni-Vincentelli and Fabio Somenzi and Adnan Aziz and Szu-Tsung Cheng and Stephen A. Edwards and Sunil P. Khatri and Yuji Kukimoto and Abelardo Pardo and Shaz Qadeer and Rajeev K. Ranjan and Shaker Sarwary and Thomas R. Shiple and Gitanjali Swamy and Tiziano Villa.
VIS.
In
Formal Methods in Computer-Aided Design (FMCAD),
pages 248-256,
Palo Alto, California,
November 1996.
|
148. |
![PDF file](icons/pdficon-large.png) |
Robert K. Brayton and Gary D. Hachtel and Alberto Sangiovanni-Vincentelli and Fabio Somenzi and Adnan Aziz and Szu-Tsung Cheng and Stephen Edwards and Sunil Khatri and Yuji Kukimoto and Abelardo Pardo and Shaz Qadeer and Rajeev K. Ranjan and Shaker Sarwary and Thomas R. Shiple and Gitanjali Swamy and Tiziano Villa..
VIS: A System for Verification and Synthesis.
In
Proceedings of the 8th International Conference on Computer-Aided Verification (CAV),
pages 428-432,
New Brunswick, New Jersey,
July 1996.
|
149. |
![PDF file](icons/pdficon-large.png) |
Stephen Edwards.
An Esterel Compiler for a Synchronous/Reactive Development System.
Masters Thesis, University of California, Berkeley.
June 1994.
Available as UCB/ERL M94/43.
|