resume
Research
I joined Google Research in June 2021, where I am part of the Brain Computer Architecture team. We are focused on inventing hardware and software solutions that can improve the efficiency of existing and future Google’s applications, including among the others databases, data analytics, and machine learning.
Until June 2021, I was an Associate Research Scientist at Columbia University, in the Department of Computer Science. Since the beginning of my PhD, I have been conducting research in the fields of computer architecture and system-level methodologies for the integration and programming of heterogeneous computing platforms.
At Columbia, I was the technical lead and a developer of the Embedded Scalable Platforms (ESP) project. Thanks to the combined efforts of the researchers of the System Level Design Group, ESP is now supporting and driving several research projects within the open-source hardware community. ESP has the objective of providing innovative automated flows for the design of complex heterogeneous systems-on-a-chip, which have become pervasive across all electronic devices.
Teaching
Since the Fall of 2017 I have been teaching at Columbia University the practical track of CSEE W4868 - System-on-Chip Platforms. This track delves into techniques for System Level Design, including SystemC, High Level Synthesis with commercial tools, and system integration with standard bus protocols.
Previously, I have been teaching assistant for both CSEE W4868 - System-on-Chip Platforms and CSEE E6998 Embedded Scalable Platforms from 2013 until my graduation in 2017. CSEE E6998 is an advanced class entirely based on the research activity related to the ESP project.
Education
I earned my Bachelor in Electronic Engineering at Universita’ di Bologna, the Master of Science in Electronic Engineering at Politecnico di Torino and the PhD in Computer Science at Columbia University, under the supervision of Prof. Luca Carloni.
Work
During my PhD, I joined as intern Intel in Hillsboro, where I was working on a research project with the data center group. I also joined the verification team at D. E. Shaw Research in New York, where I conducted research on advanced methods for hardware formal verification and model checking.
Before starting the PhD program I collaborated with the ARCES research center in Bologna and the VLSI Lab in Torino. After my master degree, I worked with R&D at Goma Elettronica in Torino, where we designed a custom embedded system for aerospace applications.